FIG. 1 is a schematic, cross sectional view of a known surface-mount structure, which contains a diode chip 10. Diode chip 10 is disposed within a package 40, the outline of which is illustrated. The structure contains an upper lead frame 20, a lower lead frame 21. Lead frames, conductive frames containing leads and headers to which an unpackaged die (or “chip”) can be attached, are well known in the semiconductor industry. The lead frames 20, 21 have header regions 20A, 21A (also known as “chip pads” or “die pads”), which are in electrical contact with diode 10 and which are commonly provided with dimples (not shown) to enhance electrical contact. The lead frames 20, 21 also have lead regions 20B, 21B that extend beyond the packaging 40. By wrapping the lead regions 20B, 21B around the underside of the packaging 40 (into a so-called “J-bend” configuration) or by bending lead regions lead regions 20B, 21B downward and outward (into a so-called “gull wing” configuration.), the structure can be readily surface mounted on another structure such as a circuit board.
Surface-mount devices having thin packaging are desirable in a number of applications, for example, in circuit boards for laptop computers, where vertical space is at a premium. The present invention addresses these and other needs by providing a multichip surface-mount device, while at the same time avoiding the need stack chips upon one another within the device.